The present invention relates generally to an integrated circuit and more particularly to an integrated circuit incorporating an amplifying function.
In recent years, demands for mobile communications have increased, and with this increase, it has been highly requested that a portable telephone, etc. be downsized and reduced both in weight and in price. Satisfying those requests involves downsizing an integrated circuit employed in the portable telephone, etc. and working to amplify a high frequency and making the circuit operable at a high efficiency under a low voltage.
Attaining the downsizing entails adopting a monolithic microwave integrated circuit(MMIC) in which necessary circuits are integrated on a substrate.
Further, for pursuing a high-efficiency operation, a so-called F-class amplifier construction is taken. This F-class amplifier is reported on pp.121-146 of Nikkei Electronics, issued on Aug. 23, 1976. The F-class amplifier is constructed mainly of a transistor working as an electric current source and a load circuit having a specified high-frequency impedance, wherein specifically a load impedance opened with respect to an odd-numbered order higher harmonic (e.g. triple waves) exclusive of an operation frequency required depending on an application but short-circuited to the ground with respect to an even-numbered order higher harmonic (e.g. double-waves) is connected to an output side of the amplifying element.
According to the construction of this F-class amplifier, it is possible to transfer an unnecessary higher harmonic other than the necessary fundamental wave back to the amplifying element and attain the high efficiency by restraining a loss down to a minimum limit.
In the construction of the above F-class amplifier, for making the load impedance appear open to the triple-waves, as illustrated In FIG. 1, a parallel resonance circuit 8 consisting of an inductor 6 and a capacitor 5 is connected in series to the circuit. This circuit is a kind of a tuning circuit and has a function to increase the impedance. In such a parallel resonance circuit 8, an electric current having the operation frequency runs across mainly the inductor 6, and, as viewed from the amplifying element 3, there is substantially a conductive state. On the other hand, the capacitor 5 also acts on the triple-waves, and the parallel resonance circuit 8 approximates to an open state as viewed from the amplifying element 3.
Thus, in the conventional circuit, the loss by the triple-wave electric power is restrained, and the high efficiency is attained.
It was, however, practiced that the inductor 6 is thinned to satisfy the request for the downsizing, with the result that an increase in resistance value is induced. Further, the inductor is hard to be formed of a thick film due to a limit in terms of a process technology. Accordingly, the resistance value of the inductor can not be reduced enough, and the electric power of the fundamental wave dissipates, whereby the high-efficiency operation is hard to attain.
Moreover, the parallel resonance circuit 8 requires at least the two elements, i.e., the inductor 6 and the capacitor 5, and therefore, the increase in chip size is induced enough to make the downsizing and an improvement of a yield impossible. Besides, it is also difficult to reduce the price.